The present invention relates to a method and apparatus for simultaneously cleaning and annealing a conductive film deposited on a substrate. More particularly, the present invention is directed to a method and apparatus for effectively rinsing contaminants from the front and back surfaces of a workpiece while annealing the same. This is accomplished by using high temperature de-ionized oxygen free water or other suitable liquids for cleaning and annealing. By this present method, tool cross contamination by way of plated metal is greatly reduced, and also grain recovery and grain growth at room temperature is greatly accelerated. Thus, the annealing time of grain growth is dramatically reduced using the present method and apparatus.
The semiconductor industry continues to be a multi-billion dollar industry as millions of semiconductor chips, devices, and integrated circuits are produced in fabrication centers throughout the world. As the demand for semiconductor chips increases so does the demand for faster, less expensive, and more reliable chips.
There are many fabrication steps in the manufacturing of semiconductor chips. The present invention focuses on a certain phase of this manufacturing process. For example, FIG. 1 illustrates a flow chart of a phase in a conventional fabrication process. Although only a limited number of process steps are illustrated in FIG. 1, other processing steps as known in the art are used during the entire fabrication process. For instance, in the electro-deposition of copper for chip interconnect or packaging applications, after metal deposition from a suitable electroplating bath, the workpiece is rinsed thoroughly with suitable liquids to reduce the amount of metal that may be present on the workpiece backside. Further, for optimal performance, it is preferable to anneal the workpiece at room temperature, oven or furnace before the chemical mechanical polishing (CMP) step.
As an example, in copper chip and packaging applications, after the plating step 2, a cleaning/rinsing step 4 is typically performed to remove spurious contaminants from the substrate or workpiece backside. Contaminants typically fall into several categories: particulate; and organic and inorganic residues such as copper sulfates or other potential contaminants that may originate from the plating bath. Having a clean workpiece backside is essential in preventing copper contamination of subsequent tools.
The cleaning/rinsing step 4 is generally performed using a liquid chemical such as about 2 to 20% mineral acid solutions containing, for example, 5% sulfuric acid. After the workpiece backside cleaning, the mineral acid is rinsed off the workpiece using strayed de-ionized (DI) water, thus completing the cleaning/rinsing step 4.
Typically, after metal plating step 2 and cleaning/rinsing step 4, the substrate is then planerized during a CMP step 8. However, for optimal device or interconnect performance, it is desirable to anneal the workpiece to stabilize the structure of the electro-deposit in an annealing step 6. Conventionally, the workpiece can be annealed in room temperature for 2-3 days, or can be annealed in a tube furnace or conventional oven for 3 minutes to 3 hours at a temperature that ranges from 50xc2x0 to 450xc2x0 C. in an inert ambient like nitrogen or vacuum.
As can be appreciated, the time and effort needed during this phase of the fabrication process can be improved and simplified. Accordingly, a more efficient and time saving method and apparatus for insitu cleaning and annealing of a plated workpiece is disclosed herein.
It is an object of the present invention to provide a method and apparatus for insitu simultaneously cleaning/annealing of a plated substrate.
It is another object of the present invention to provide a method and apparatus for simultaneously cleaning/annealing a plated semiconductor device or package.
It is a further object of the present invention to provide a method and apparatus for simultaneously cleaning/annealing a semiconductor device or package with minimal time.
These and other objects of the present invention are obtained by providing a chamber for simultaneously cleaning and annealing semiconductor workpieces. The method according to the present invention includes the steps of initially rinsing (spraying) the workpiece with preferably, mineral acids such as 5-20% sulfuric acid, followed by a brief DI water rinse, then replacing the DI water with heated deoxygenated DI water in order to simultaneously clean/anneal the workpiece. Alternatively, the workpiece can be initially rinsed with DI water and then rinsed with mineral acids. Thereafter, heated deoxygenated DI water is used to simultaneously clean/anneal the workpiece.